Semiconductor nanowires have received much attention in recent years to further the scaling of electronic devices, and for their use in memory, sensors, photonics, and 3-D integrated devices. Germanium nanowires, in particular, are of great interest due to their low synthesis temperatures and high carrier mobility compared to silicon. However, there exists little work to date exploring the low-temperature controlled-synthesis of germanium nanowires. This work studies the heteroepitaxy of germanium nanowires on silicon substrates. Key parameters such as substrate orientation, growth temperature, partial pressure of reactive gas, thermal history, and exposure to ambient atmosphere are identified, and their effects on the resulting epitaxial nanowire synthesis are studied. Additionally, self-assembled highly oriented cylindrical mesopores are used as templates for controlling nanowire synthesis and serve as an attractive alternative to epitaxy. In this method, the orientations and dimensions of the pores control the growth of nanowires (direction, density, order, and size) irrespective of the starting substrate.
Stable passivation techniques post-growth to prevent subsequent oxidation are also essential for realizing the large scale integration of nanowires. The well known HF treatments that have been used for decades in silicon processing are ineffective in passivating germanium surfaces, thus beckoning the need for new passivation solutions. This dissertation presents systematic studies performed to passivate germanium nanowires using aqueous halides (HF, HCl, HBr, and HI). Hydrogen bromide passivated germanium surfaces for well over 24 hours with negligible etching of germanium, and is consequently identified as the most promising candidate among the aqueous hydrogen halides.
The final portion of this dissertation discusses the integration of nanowires into back-gate field-effect transistors. Important considerations in the choice of source/drain electrode materials and improvements in transistor fabrication are discussed to increase device yield and simplify the fabrication process. The performance of the resulting Schottky source/drain nanowire transistor is studied.
Addressing the challenges in the synthesis and passivation of nanowires, along with their integration into electronic and photonic devices will be crucial for the successful use of nanowires in any application.
